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Director, Hardware Engineering

Inspiresemi Com

AustinHybrid2mo ago
Employment
Full-time
Seniority
Lead

About the role

  • Be a Pioneer: Get in on the ground floor of a hypergrowth startup! You'll be part of the leadership team shaping the future of computing.
  • Scale the Vision: You will have the opportunity to build, scale, and mentor a team.
  • Rewarding Compensation: We offer a competitive salary, performance-based bonuses, and significant equity.
  • Flexibility: Benefit from a hybrid work model and flexible time off.
  • Strategic Silicon Roadmap: Own the hardware execution strategy. Make critical decisions on process node selection, third-party IP integration, and package design.
  • Team Scaling & Mentorship: Recruit and lead a world class team.
  • Hardware-Software Relationship: Partner with the Director of Software to ensure the hardware architecture is optimized for modern HPC workloads and compiler efficiency.
  • Execution Excellence: Drive the methodology for multi-site design synchronization, ensuring top-tier verification coverage and first-pass silicon success.
  • Vendor & Foundry Management: Manage high-level relationships with foundries, EDA vendors, and IP providers to ensure favorable terms and support.
  • Post-Silicon Leadership: Oversee the transition from GDSII to silicon bring-up, working with yield and test engineering to drive high-volume manufacturing readiness.
  • Experience: 15+ years in semiconductor engineering, with 8+ years in leadership roles managing complex SoC or CPU projects.
  • Advanced Node Expertise: Proven track record leading development cycles for bleeding-edge silicon, specifically at 5nm or below technology nodes.
  • Education: A Bachelor’s or Master’s in Electrical Engineering or Computer Engineering. A PhD is a plus.
  • Technical Mastery: Deep expertise in the full Netlist-to-GDSII flow, including high-speed interconnects, memory hierarchies, and power delivery.
  • Tape-out Track Record: Proven history of leading multiple successful tape-outs on advanced FinFET nodes.
  • Business Acumen: Ability to balance technical perfection with time-to-market pressures and budgetary constraints.
  • Influence: A strong reputation in the silicon industry with the ability to attract top-tier talent and negotiate with global partners.
  • Experience with large-scale mesh interconnects or many-core architectures.
  • Background in advanced packaging (2.5D/3D IC, Chiplets).
  • Direct experience with RISC-V ISA implementation at scale.

Perks & benefits

  • Unlimited Vacation
  • Equity Compensation

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