Sr. Director - SoC Front End Engineering

<div class="content-intro"><p><span style="font-size: 12pt;"><strong>Company Overview</strong></span></p> <p><strong>Ambiq</strong>&nbsp;is on a mission to enable intelligence everywhere — powering the AI edge revolution with the world's lowest-power semiconductor solutions.</p> <p>Built on our proprietary sub- and near-threshold technology, our chips deliver multi-fold improvements in energy efficiency without costly process scaling. Since 2010, we've shipped over 300 million units to customers building smarter wearables, medical devices, IoT products, and AI-powered edge applications.</p> <p>Our cross-functional teams span design, research, development, production, marketing, sales, and operations across Austin, Hsinchu, Shanghai, Shenzhen, and Singapore. We move fast, tackle hard problems, and create space for people to grow through complex, meaningful work that shapes the future of technology.</p> <p>We're looking for self-motivated, creative problem-solvers who are eager to push technological limits and make a real impact in energy efficiency.</p> <p>At Ambiq, we live by five values:&nbsp;<strong>Innovate. Collaborate. Focus. Learn. Achieve.</strong></p> <p>If that's you, join us — the intelligence everywhere revolution starts here.</p> <p>&nbsp;</p></div><p><span data-ccp-props="{&quot;134233117&quot;:true,&quot;134233118&quot;:true,&quot;201341983&quot;:0,&quot;335559740&quot;:240}"><u><strong>This role will be on-site 5 days a week in NW Austin.</strong></u></span></p> <div class="pcty-row-flex pcty-margin-compact-all pcty-compact-margin-all css-0"> <div class="pcty-col css-a3cc3r"> <div class="" data-automation-id="job-description"> <p data-start="1267" data-end="1535">Ambiq is seeking a <strong data-start="1286" data-end="1330">Senior Director of Front-End Engineering</strong> to lead the design and implementation of our <strong data-start="1376" data-end="1391">Edge AI MCU</strong> portfolio — driving the digital design, integration, and verification of ultra-low-power SoCs purpose-built for machine learning at the edge.</p> <p data-start="1537" data-end="1884">This is a <strong data-start="1547" data-end="1586">hands-on, strategic leadership role</strong> responsible for building and scaling a world-class engineering organization that delivers breakthrough performance-per-microwatt. The ideal candidate combines deep technical acumen with people leadership excellence and has a proven record of bringing advanced SoCs from architecture to production.</p> <hr data-start="1886" data-end="1889"> <h2 data-start="1891" data-end="1918"><strong data-start="1894" data-end="1918">Key Responsibilities</strong></h2> <h3 data-start="1920" data-end="1948"><strong data-start="1924" data-end="1948">Technical Leadership</strong></h3> <ul data-start="1949" data-end="2675"> <li data-start="1949" data-end="2119"> <p data-start="1951" data-end="2119">Own and drive the front-end design of Ambiq’s Edge AI MCU platforms — including <strong data-start="2031" data-end="2117">CPU subsystems, neural accelerators, security, memory, and peripheral integration.</strong></p> </li> <li data-start="2120" data-end="2264"> <p data-start="2122" data-end="2264">Lead architecture definition, RTL design, and subsystem integration focused on <strong data-start="2201" data-end="2231">power-optimized AI compute</strong> and <strong data-start="2236" data-end="2262">real-time performance.</strong></p> </li> <li data-start="2265" data-end="2410"> <p data-start="2267" data-end="2410">Develop and enforce world-class design methodologies across RTL, verification (UVM), and static checks (lint, CDC, DFT readiness).</p> </li> <li data-start="2411" data-end="2540"> <p data-start="2413" data-end="2540">Partner with Architecture and Physical Design teams to ensure seamless PPA optimization and first-silicon success.</p> </li> <li data-start="2541" data-end="2675"> <p data-start="2543" data-end="2675">Evaluate and deploy next-generation EDA tools, design automation, and verification infrastructure to accelerate tapeout readiness.</p> </li> </ul> <h3 data-start="2677" data-end="2705"><strong data-start="2681" data-end="2705">Execution &amp; Delivery</strong></h3> <ul data-start="2706" data-end="3037"> <li data-start="2706" data-end="2813"> <p data-start="2708" data-end="2813">Drive design execution for multiple MCU programs concurrently, from concept through production tapeout.</p> </li> <li data-start="2814" data-end="2930"> <p data-start="2816" data-end="2930">Define and track program milestones, deliverables, and risk management plans with cross-functional stakeholders.</p> </li> <li data-start="2931" data-end="3037"> <p data-start="2933" data-end="3037">Establish design review frameworks and sign-off criteria ensuring predictable, high-quality execution.</p> </li> </ul> <h3 data-start="3039" data-end="3079"><strong data-start="3043" data-end="3079">People &amp; Organization Leadership</strong></h3> <ul data-start="3080" data-end="3489"> <li data-start="3080" data-end="3185"> <p data-start="3082" data-end="3185">Lead and grow a team of front-end engineers across design, verification, and integration disciplines.</p> </li> <li data-start="3186" data-end="3269"> <p data-start="3188" data-end="3269">Build a culture of <strong data-start="3207" data-end="3267">technical excellence, collaboration, and accountability.</strong></p> </li> <li data-start="3270" data-end="3373"> <p data-start="3272" data-end="3373">Mentor senior technical staff and create clear pathways for career growth and technical leadership.</p> </li> </ul> <h3 data-start="3491" data-end="3529"><strong data-start="3495" data-end="3529">Cross-Functional Collaboration</strong></h3> <ul data-start="3530" data-end="3938"> <li data-start="3530" data-end="3679"> <p data-start="3532" data-end="3679">Collaborate closely with system architects, analog/mixed-signal, and validation teams to co-optimize hardware and software performance.</p> </li> <li data-start="3680" data-end="3813"> <p data-start="3682" data-end="3813">Partner with Product Management to translate application requirements (vision, voice, sensing) into silicon-level specifications.</p> </li> <li data-start="3814" data-end="3938"> <p data-start="3816" data-end="3938">Interface with Operations, Test, and Product Engineering to ensure DFT, yield, and manufacturability goals are achieved.</p> </li> </ul> <hr data-start="3940" data-end="3943"> <h2 data-start="3945" data-end="3966"><strong data-start="3948" data-end="3966">Qualifications</strong></h2> <h3 data-start="3968" data-end="3984"><strong data-start="3972" data-end="3984">Required</strong></h3> <ul data-start="3985" data-end="4858"> <li data-start="3985" data-end="4146"> <p data-start="3987" data-end="4146"><strong data-start="3987" data-end="4000">20+ years</strong> of experience in semiconductor front-end design and verification, with 15<strong data-start="4072" data-end="4084">+ years</strong> in a leadership capacity managing multi-disciplinary teams.</p> </li> <li data-start="4147" data-end="4244"> <p data-start="4149" data-end="4244">Proven track record of delivering <strong data-start="4183" data-end="4204">MCU, SoC, or ASIC</strong> products into high-volume production.</p> </li> <li data-start="4245" data-end="4360"> <p data-start="4247" data-end="4360">Expertise in <strong data-start="4260" data-end="4288">low-power digital design</strong>, including multi-voltage domains, power gating, and clock management.</p> </li> <li data-start="4361" data-end="4454"> <p data-start="4363" data-end="4454">Strong hands-on understanding of <strong data-start="4396" data-end="4418">SystemVerilog, UVM</strong>, and synthesis/STA methodologies.</p> </li> <li data-start="4455" data-end="4557"> <p data-start="4457" data-end="4557">Familiarity with <strong data-start="4474" data-end="4518">ARM Cortex-M/R/A or RISC-V architectures</strong> and on-chip interconnects (AHB/AXI).</p> </li> <li data-start="4558" data-end="4669">Excellent communication and leadership skills; proven ability to lead complex, cross-site teams.</li> <li data-start="4771" data-end="4858"> <p data-start="4773" data-end="4858"><strong data-start="4773" data-end="4787">Education:</strong> BS/MS in Electrical or Computer Engineering required; Ph.D. preferred.</p> </li> </ul> <h3 data-start="4860" data-end="4877"><strong data-start="4864" data-end="4877">Preferred</strong></h3> <ul data-start="4878" data-end="5261"> <li data-start="5090" data-end="5186"> <p data-start="5092" data-end="5186">Experience with <strong data-start="5108" data-end="5160">subthreshold or near-threshold design techniques</strong> and <strong data-start="5165" data-end="5184">power modeling.</strong></p> </li> <li data-start="5187" data-end="5261"> <p data-start="5189" data-end="5261">Knowledge of <strong data-start="5202" data-end="5241">EDA flows at advanced process nodes</strong> (16nm and below).</p> </li> </ul> <hr data-start="5263" data-end="5266"> <h2 data-start="5268" data-end="5298"><strong data-start="5271" data-end="5298">What Success Looks Like</strong></h2> <ul data-start="5299" data-end="5606"> <li data-start="5299" data-end="5367"> <p data-start="5301" data-end="5367">First-pass silicon success across multiple Edge AI MCU programs.</p> </li> <li data-start="5368" data-end="5450"> <p data-start="5370" data-end="5450">Demonstrable improvements in design productivity, quality, and predictability.</p> </li> <li data-start="5451" data-end="5523"> <p data-start="5453" data-end="5523">Market-leading metrics enabling industry-best energy efficiency.</p> </li> <li data-start="5524" data-end="5606"> <p data-start="5526" data-end="5606">A cohesive, motivated team operating at high technical and cultural standards.</p> </li> </ul> </div> </div> </div> <p style="margin: 0in; font-family: Calibri; font-size: 11.0pt;">**Must be currently authorized to work in the United States for any employer. We do not sponsor or take over sponsorship of employment visas (now or in the future) for this role.</p>