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About the role
<div class="content-intro"><p><span data-contrast="none">Cerebras Systems builds the world's largest AI chip, 56 times larger than GPUs. Our novel wafer-scale architecture provides the AI compute power of dozens of GPUs on a single chip, with the programming simplicity of a single device. This approach allows Cerebras to deliver industry-leading training and inference speeds and empowers machine learning users to effortlessly run large-scale ML applications, without the hassle of managing hundreds of GPUs or TPUs. </span><span data-ccp-props="{"134233117":false,"134233118":false,"201341983":0,"335559685":0,"335559737":240,"335559738":240,"335559739":240,"335559740":279}"> </span></p>
<p>Cerebras' current customers include top model labs, global enterprises, and cutting-edge AI-native startups. <a href="https://openai.com/index/cerebras-partnership/">OpenAI recently announced a multi-year partnership with Cerebras</a>, to deploy 750 megawatts of scale, transforming key workloads with ultra high-speed inference. </p>
<p>Thanks to the groundbreaking wafer-scale architecture, Cerebras Inference offers the fastest Generative AI inference solution in the world, over 10 times faster than GPU-based hyperscale cloud inference services. This order of magnitude increase in speed is transforming the user experience of AI applications, unlocking real-time iteration and increasing intelligence via additional agentic computation.</p></div><p><strong>About The Role</strong></p>
<p><span data-contrast="auto">As a member of our tight knit physical design team, you will be working on the design and analysis of 3D integrated products. This role involves a combination of traditional ASIC/SoC physical design skills, packaging, power, clock and cooling analysis. You will work closely with the architecture and RTL team to do R&D on novel concepts for 3D integration.</span><span data-ccp-props="{"201341983":0,"335559740":240}"> </span></p>
<p><strong><span data-contrast="auto">Skills and Qualifications</span></strong></p>
<p><strong><span data-contrast="none">Required</span><span data-ccp-props="{"201341983":0,"335559740":240}"> </span></strong></p>
<ul>
<li><span data-contrast="auto"> 10+ years of physical design/verification experience.</span><span data-ccp-props="{"201341983":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto"> Strong knowledge of block level and full-chip physical verification methodology.</span><span data-ccp-props="{"201341983":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto"> Expert at optimizing for the best power/performance and area.</span></li>
<li><span data-contrast="auto"> Experience with the complete physical design flow. Knowledge of Synopsys tool suite is a plus.</span><span data-ccp-props="{"201341983":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto"> Expert with ICV or Calibre tools resolving block and full-chip DRC and LVS issues.</span><span data-ccp-props="{"201341983":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto"> Expert with IR/EM analysis and resolution.</span></li>
<li><span data-contrast="auto"> Strong ability in scripting languages like Tcl and Python. Ability to make flow enhancements.</span><span data-ccp-props="{"201341983":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto"> Demonstrated ability to work with RTL teams to optimize for physical design.</span></li>
<li><span data-contrast="none"> Knowledge of 2.5D or 3D packaging solutions.</span></li>
<li><span data-contrast="none"> Must have experience with 3d physical design, 3d die stacking, 3d chip design, die-to-die or wafer-to-wafer.</span></li>
</ul>
<p><strong><span data-contrast="auto">Preferred</span></strong><span data-contrast="auto"><strong> </strong> </span><span data-ccp-props="{"201341983":0,"335559740":240}"> </span></p>
<ul>
<li><span data-contrast="auto"> Experience doing full chip floor planning and integration. </span><span data-ccp-props="{"201341983":0,"335559740":240}"> </span></li>
<li><span data-contrast="auto"> Knowledge of clock distribution.</span></li>
<li><span data-contrast="auto"> Knowledge of cooling analysis.</span></li>
</ul>
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<div class="p-rich_text_section">The salary range for this position is $230,000 – $280,000 annually. Actual compensation will be determined based on factors such as experience, skills, qualifications, and location.</div>
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</div><div class="content-conclusion"><h4><strong>Why Join Cerebras</strong></h4>
<p>People who are serious about software make their own hardware. At Cerebras we have built a breakthrough architecture that is unlocking new opportunities for the AI industry. With dozens of model releases and rapid growth, we’ve reached an inflection point in our business. Members of our team tell us there are five main reasons they joined Cerebras:</p>
<ol>
<li>Build a breakthrough AI platform beyond the constraints of the GPU.</li>
<li>Publish and open source their cutting-edge AI research.</li>
<li>Work on one of the fastest AI supercomputers in the world.</li>
<li>Enjoy job stability with startup vitality.</li>
<li>Our simple, non-corporate work culture that respects individual beliefs.</li>
</ol>
<p>Read our blog: <a href="https://www.cerebras.net/blog/5-reasons-to-join-cerebras" target="_blank" data-auth="NotApplicable" data-linkindex="0">Five Reasons to Join Cerebras in 2026.</a></p>
<h4>Apply today and become part of the forefront of groundbreaking advancements in AI!</h4>
<hr>
<p><em>Cerebras Systems is committed to creating an equal and diverse environment and is proud to be an equal opportunity employer. </em><em>We celebrate different backgrounds, perspectives, and skills. We believe inclusive teams build better products and companies. </em><em>We try every day to build a work environment that empowers people to do their best work through continuous learning, growth and support of those around them.</em></p>
<hr>
<p><em>This website or its third-party tools process personal data. For more details, click <a href="https://www.cerebras.net/privacy/" target="_blank">here</a> to review our CCPA disclosure notice.</em></p></div>
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