Semiconductor Package Development Engineer

At Universal Quantum, we aim to make the world a better place by engineering the future of computing. Together, we are creating truly impactful quantum computers. Our machines will be capable of solving problems until now considered impossible, with applications across healthcare, advanced materials, aerospace and beyond.

As we expand our engineering presence in Japan, we are looking for a Semiconductor Package Development Engineer to help realise truly scalable quantum computers. This role will drive the development of advanced semiconductor packaging solutions for next-generation quantum microchips, working at the intersection of materials science, microfabrication and quantum technology.

What You’ll Accomplish: 

• You will initiate packaging concepts and drive advanced IC package development leveraging ceramic package technology to support next-gen quantum microchips. 

• You will drive methodology, innovations, and productivity improvements in package development both internally and with external vendors. 

• You will develop packages for testing in silicon for a variety of extreme environments, such as cryogenic and low vacuum.   

Requirements

Must-have Skills

• Business-level Japanese and English communication skills, with the ability to lead technical discussions, documentation, and supplier interactions in both languages. 

• Package design and layout capabilities 

• Semiconductor Package Experience  

• Micro-assembly techniques and materials processing knowledge 

• Use of CAD tools and Thermo-mechanical Simulation. 

• Finite Element Modelling (FEM) thermal, electrical and mechanical simulations. 

• Experience in testing methodology for Electro-mechanical testing of IC packaging. 

• Implement ‘Design for X’ in the package.   

• Resolving package reliability issues, especially over a large temperature range. 

• Understanding of semiconductor assembly manufacturing 

• Knowledge in packaging failure mechanism and understanding mechanical and thermal stresses 

• Good general engineering problem solving skills with strong engineering physics and fundamentals 

• PhD / senior expertise in mechanical engineering, material science, physics, packaging, micro/nanofabrication or similar required 

Nice-to-have Skills:  

• Knowledge of Through Silicon Via, Silicon processing techniques, Thin Film Processing. 

• Experience with 2.5/3D packaging methods 

• Electro-Mechanical testing at Cryo-temperatures 

• Low outgassing/ Ultra High Vacuum compatibility experience 

• High voltage/power package qualifications.  

• Process engineering experience. 

• Advanced package assembly experience